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Péter Márk
8bitAdder_FPGA
Commits
cad9df07
Commit
cad9df07
authored
1 year ago
by
Péter Márk
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Benne van a konvertált kód, ezt töltöttem fel az FPGA-ra
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cad9df07
LIBRARY
ieee
;
USE
ieee
.
std_logic_1164
.
ALL
;
USE
ieee
.
numeric_std
.
ALL
;
USE
work
.
data_types
.
ALL
;
ENTITY
instr_rom
IS
PORT
(
a
:
IN
unsigned
(
31
DOWNTO
0
);
do
:
OUT
unsigned
(
31
DOWNTO
0
)
);
END
instr_rom
;
ARCHITECTURE
behave
OF
instr_rom
IS
TYPE
rom_type
IS
ARRAY
(
0
TO
ROM_SIZE
-
1
)
OF
unsigned
(
31
DOWNTO
0
);
SIGNAL
ROM
:
rom_type
:
=
(
--00000000 <main>:
x"ff010113"
,
-- addi x2 x2 -16
x"00000513"
,
-- addi x10 x0 0
x"00000613"
,
-- addi x12 x0 0
x"800005b7"
,
-- lui x11 0x80000
x"0080006f"
,
-- jal x0 8 <LBB0_2>
--0000014 <LBB0_1>:
x"00d5a023"
,
-- sw x13 0 x11
--00000018 <LBB0_2>:
x"0045a683"
,
-- lw x13 4 x11
x"0085a703"
,
-- lw x14 8 x11
x"00177713"
,
-- andi x14 x14 1
x"00e12623"
,
-- sw x14 12 x2
x"0085a703"
,
-- lw x14 8 x11
x"00277713"
,
-- andi x14 x14 2
x"00e12423"
,
-- sw x14 8 x2
x"0085a703"
,
-- lw x14 8 x11
x"00477713"
,
-- andi x14 x14 4
x"00e12223"
,
-- sw x14 4 x2
x"00c12703"
,
-- lw x14 12 x2
x"00070663"
,
-- beq x14 x0 12 <LBB0_4>
x"00068513"
,
-- addi x10 x13 0
x"0100006f"
,
-- jal x0 16 <LBB0_6>
--00000050 <LBB0_4>:
x"00812703"
,
-- lw x14 8 x2
x"00070463"
,
-- beq x14 x0 8 <LBB0_6>
x"00068613"
,
-- addi x12 x13 0
--0000005c <LBB0_6>:
x"00412703"
,
-- lw x14 4 x2
x"fa070ae3"
,
-- beq x14 x0 -76 <LBB0_1>
x"00a606b3"
,
-- add x13 x12 x10
x"00d12023"
,
-- sw x13 0 x2
x"0085a683"
,
-- lw x13 8 x11
x"0046f693"
,
-- andi x13 x13 4
x"fa0682e3"
,
-- beq x13 x0 -92 <LBB0_2>
--0000078 <LBB0_8>:
x"00012683"
,
-- lw x13 0 x2
x"00d5a023"
,
-- sw x13 0 x11
x"0085a683"
,
-- lw x13 8 x11
x"0046f693"
,
-- andi x13 x13 4
x"fe0698e3"
,
-- bne x13 x0 -16 <LBB0_8>
x"f8dff06f"
,
-- jal x0 -116 <LBB0_2>
OTHERS
=>
to_unsigned
(
0
,
32
)
);
BEGIN
do
<=
ROM
(
to_integer
(
a
(
31
DOWNTO
2
))
REM
ROM
'length
);
END
behave
;
\ No newline at end of file
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