From 100c496131f82529c6daa27c6cca073118f49f2a Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Mlink=C3=B3=20P=C3=A9ter?= <mlinko.peter@hallgato.ppke.hu>
Date: Mon, 10 Dec 2018 15:40:40 +0100
Subject: [PATCH] constraints
---
.../constrs_1/new/constraints.xdc | 42 +++++++++----------
1 file changed, 21 insertions(+), 21 deletions(-)
diff --git a/game_of_life_v2/game_of_life_v2.srcs/constrs_1/new/constraints.xdc b/game_of_life_v2/game_of_life_v2.srcs/constrs_1/new/constraints.xdc
index 3937baa..bdc8595 100644
--- a/game_of_life_v2/game_of_life_v2.srcs/constrs_1/new/constraints.xdc
+++ b/game_of_life_v2/game_of_life_v2.srcs/constrs_1/new/constraints.xdc
@@ -1,27 +1,27 @@
-set_property PACKAGE_PIN Y9 [get_ports {GCLK}]; # "GCLK"
+set_property PACKAGE_PIN Y9 [get_ports {clk}]; # "GCLK"
-set_property PACKAGE_PIN Y21 [get_ports {VGA_B1}]; # "VGA-B1"
-set_property PACKAGE_PIN Y20 [get_ports {VGA_B2}]; # "VGA-B2"
-set_property PACKAGE_PIN AB20 [get_ports {VGA_B3}]; # "VGA-B3"
-set_property PACKAGE_PIN AB19 [get_ports {VGA_B4}]; # "VGA-B4"
-set_property PACKAGE_PIN AB22 [get_ports {VGA_G1}]; # "VGA-G1"
-set_property PACKAGE_PIN AA22 [get_ports {VGA_G2}]; # "VGA-G2"
-set_property PACKAGE_PIN AB21 [get_ports {VGA_G3}]; # "VGA-G3"
-set_property PACKAGE_PIN AA21 [get_ports {VGA_G4}]; # "VGA-G4"
-set_property PACKAGE_PIN AA19 [get_ports {VGA_HS}]; # "VGA-HS"
-set_property PACKAGE_PIN V20 [get_ports {VGA_R1}]; # "VGA-R1"
-set_property PACKAGE_PIN U20 [get_ports {VGA_R2}]; # "VGA-R2"
-set_property PACKAGE_PIN V19 [get_ports {VGA_R3}]; # "VGA-R3"
-set_property PACKAGE_PIN V18 [get_ports {VGA_R4}]; # "VGA-R4"
-set_property PACKAGE_PIN Y19 [get_ports {VGA_VS}]; # "VGA-VS"
+set_property PACKAGE_PIN Y21 [get_ports {frame[0]}]; # "VGA-B1"
+set_property PACKAGE_PIN Y20 [get_ports {frame[1]}]; # "VGA-B2"
+set_property PACKAGE_PIN AB20 [get_ports {frame[2]}]; # "VGA-B3"
+set_property PACKAGE_PIN AB19 [get_ports {frame[3]}]; # "VGA-B4"
+set_property PACKAGE_PIN AB22 [get_ports {frame[4]}]; # "VGA-G1"
+set_property PACKAGE_PIN AA22 [get_ports {frame[5]}]; # "VGA-G2"
+set_property PACKAGE_PIN AB21 [get_ports {frame[6]}]; # "VGA-G3"
+set_property PACKAGE_PIN AA21 [get_ports {frame[7]}]; # "VGA-G4"
+set_property PACKAGE_PIN AA19 [get_ports {Hsync}]; # "VGA-HS"
+set_property PACKAGE_PIN V20 [get_ports {frame[8]}]; # "VGA-R1"
+set_property PACKAGE_PIN U20 [get_ports {frame[9]}]; # "VGA-R2"
+set_property PACKAGE_PIN V19 [get_ports {frame[10]}]; # "VGA-R3"
+set_property PACKAGE_PIN V18 [get_ports {frame[11]}]; # "VGA-R4"
+set_property PACKAGE_PIN Y19 [get_ports {Vsync}]; # "VGA-VS"
-set_property PACKAGE_PIN P16 [get_ports {BTNC}]; # "BTNC"
-set_property PACKAGE_PIN R16 [get_ports {BTND}]; # "BTND"
-set_property PACKAGE_PIN N15 [get_ports {BTNL}]; # "BTNL"
-set_property PACKAGE_PIN R18 [get_ports {BTNR}]; # "BTNR"
-set_property PACKAGE_PIN T18 [get_ports {BTNU}]; # "BTNU"
+#set_property PACKAGE_PIN P16 [get_ports {BTNC}]; # "BTNC"
+#set_property PACKAGE_PIN R16 [get_ports {BTND}]; # "BTND"
+#set_property PACKAGE_PIN N15 [get_ports {BTNL}]; # "BTNL"
+#set_property PACKAGE_PIN R18 [get_ports {BTNR}]; # "BTNR"
+#set_property PACKAGE_PIN T18 [get_ports {BTNU}]; # "BTNU"
-set_property PACKAGE_PIN F22 [get_ports {SW0}]; # "SW0"
+set_property PACKAGE_PIN F22 [get_ports {switch_mode}]; # "SW0"
set_property IOSTANDARD LVCMOS33 [get_ports -of_objects [get_iobanks 33]];
set_property IOSTANDARD LVCMOS18 [get_ports -of_objects [get_iobanks 34]];
--
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